How to Choose an FPGA for Your Project: Resources × Transceivers × Price Decision Matrix
The most common FPGA selection mistake: picking a chip model first and reverse-engineering the requirements, or looking only at price without resource margin. The correct order: define bandwidth needs (transceiver pairs) → calculate logic resources (LC/DSP) → pick the cheapest board that meets both. This article turns Duyuan’s main product line into a decision matrix you can reuse.
1. Three-Step Selection: Bandwidth → Resources → Price
Many engineers choose in the wrong order. The correct decision chain:
1. Step 1: Define bandwidth — how many high-speed transceiver pairs do you need? (Fiber? PCIe? JESD204B?) This step eliminates half the options.
2. Step 2: Calculate resources — are logic cells (LC), DSP slices, and BRAM enough? Leave 30%~50% margin.
3. Step 3: Compare price — among boards that pass steps 1 and 2, pick the best value.
Why bandwidth first? Transceivers are the most expensive and least scalable FPGA resource — if logic is short you can downsize, but if transceivers are short you must step up to a bigger chip. No middle ground.
2. Duyuan Main Product Parameter Matrix
| Model | Chip | Logic | DSP | High-speed Transceivers | DDR | PCIe | Price |
|---|---|---|---|---|---|---|---|
| PBC7K325G | China Kintex-7 | 326K LC | 840 | 8× GTP | 2GB DDR3 | Gen2 x8 | ¥1,999 |
| DUK7410T | FMSH JFM7K410T | 410K LC | 920 | 8× GTP | 4GB DDR3 | Gen2 x8 | ¥9,999 |
| PG3T500 | Pango Titan3 | ~500K LC | ~1,200 | 16× GTP+ | 4GB DDR4 | Gen3 x8 | ¥5,999 |
| DUF7690T | FMSH JFM7VX690T | 693K LC | 3,600 | 36× GTH @10.3G | 4GB DDR3 | Gen3 x8 | ¥24,999 |
| XCKU15P | AMD Kintex UltraScale+ | ~400K LC | 1,680 | 24× GTY 28G + 32× GTH 16G | 8GB DDR4 ECC | Gen3 x16 | ¥15,999 |
3. Choose by Scenario
Scenario 1: Industrial Control / Simple Logic / Entry Learning
Needs: a few hundred KB of logic, no high-speed transceivers, tight budget.
- Choose PBC7K325G (¥1,999): 326K LC is enough, industrial-grade -40~85°C, FMC LPC expandable.
- Avoid DUK7410T: 5× more expensive, resources unused.
Scenario 2: Multi-channel ADC Acquisition / JESD204B / SDR
Needs: 4~8 transceiver pairs for ADC, sufficient DDR bandwidth, DSP for DDC.
- Choose DUK7410T (¥9,999): 8× GTP + 4GB DDR3, single FMC HPC for one ADC mezzanine.
- For dual ADC mezzanines: choose DUF7690T (¥24,999): dual FMC HPC, 36× GTH.
Scenario 3: Video Processing / 4K Stitching / Industrial Vision
Needs: multi-channel video I/O, large DDR bandwidth, enough logic for scaling/filtering.
- Choose PG3T500 (¥5,999): 4GB DDR4 + 16 transceivers, best value.
- For multi-channel 4K overlay: choose XCKU15P (¥15,999): DDR4 ECC 19.2 GB/s, UltraScale+ transceivers handle 10G easily.
Scenario 4: High-speed Fiber / PCIe Gen3 / Data Center
Needs: PCIe Gen3 x8+, 10G/25G fiber, large DDR bandwidth.
- Choose XCKU15P (¥15,999): PCIe Gen3 x16 + GTY 28G transceivers, 8GB DDR4 ECC.
- Avoid DUF7690T: GTH tops out at 10.3G, cannot run 25G.
4. How Much Resource Margin
The most common selection error: “just barely enough.” FPGAs are not CPUs — after synthesis, routing congestion and timing closure issues mean resources look sufficient but don’t run.
| Resource Type | Recommended Margin | Why |
|---|---|---|
| Logic Cells (LC) | ≥ 30%~50% | Post-synthesis logic expansion + routing congestion |
| DSP Slice | ≥ 20% | Filter coefficients, FFT point count will change |
| BRAM | ≥ 20% | FIFO depth, line buffers will grow |
| Transceivers | ≥ 2 spare pairs | Leave one pair for loopback testing |
| DDR Bandwidth | ≥ 30% | Peak traffic exceeds average |
A Real Example
Project: 4× 1080p stitched to 4K output.
- Bandwidth need: combined DDR read/write ≈ 6 GB/s → DUK7410T with DDR3 14.9 GB/s gives 60% margin.
- Logic need: scaling + stitching ≈ 200K LC → DUK7410T has 410K LC, 50% margin.
- Conclusion: DUK7410T (¥9,999) is the best choice; no need to step up to DUF7690T.
5. China vs Imported: When You Must Use Domestic FPGA
Not every project needs a China FPGA. Ask yourself three questions:
1. Is there a domestic / Xinchuang requirement? — if yes, choose from FMSH / Pango.
2. Is industrial temperature range (-40~85°C) needed? — PBC7K325G / PBC7Z020G are industrial-grade; commercial Xilinx boards only reach 0~70°C.
3. Is 25G/100G ultra-high speed needed? — domestic FPGA transceivers top out at 10.3G (GTH); above that you must choose AMD UltraScale+.
Choosing an FPGA is not about picking the most expensive or the cheapest — it’s about picking the one that “just meets bandwidth needs, leaves enough resource margin, and fits the budget.” Define transceiver pairs first, then LC and DDR, then compare price. Three steps, and you won’t go wrong.
