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Application Practice

Four-Channel 1080p Stitching to 4K Output: A Bandwidth Ledger

Stitching four 1080p camera feeds into one 4K output looks like "just putting four pictures together," but behind it lies a bandwidth ledger: input bandwidth, DDR frame-buffer bandwidth, scaling engine bandwidth, and output bandwidth — four layers stacked on top of each other. Get the math wrong and you get stuttering, tearing, or DDR overload. This article walks through every layer from pixel clock upward.

2026-10-12·Read more →
Application Practice

Real-Time Industrial Vision Inspection with FPGA: From GigE Cameras to Defect Calibration

Along a production-line defect inspection pipeline, from camera pixels to the rejection signal, where exactly is the FPGA irreplaceable? This article first tallies the bandwidth budget of the full data flow, then breaks down the four roles FPGA plays in the vision pipeline, compares the real-time limits of traditional algorithms versus deep learning, and finally gives a deployable hardware selection through a real PCB solder-joint AOI station case.

2026-10-08·Read more →
Application Practice

Building High-Speed Data Acquisition Cards with FPGA: Why FMC HPC + PCIe x8 Is the Golden Combination

Oscilloscopes, digitizers, phased-array radars, software-defined radios and high-speed vibration monitoring — the core of all these systems is "high-speed ADC sampling → data packing → transfer to the host for processing." Why must this step use an FPGA rather than an MCU, a DSP or a CPU sampling directly? Why have the FMC HPC connector and the PCIe x8 interface become the golden combination for high-speed acquisition cards? This article starts from a real 250MSPS acquisition project.

2026-10-07·Read more →
Application Practice

VU13P in Quantitative Trading: A Low-Latency Hardware Platform from Market Data Decoding to Order Execution

The essence of quantitative trading is completing the information loop of market data arrival, signal computation and order transmission in the shortest possible time. This article uses the AMD Virtex UltraScale+ XCVU13P (VU13P) platform as the main thread, explaining why it fits quantitative trading and how to deploy it into a deliverable low-latency trading chain.

2026-09-27·Read more →
Selection Guide

High-End Drone Computing Architecture Selection Guide: The Technical Logic and Product Options of Pure FPGA vs. MPSoC

In the design of onboard computing architectures for high-end drones, "pure FPGA or MPSoC" is an unavoidable core question. Pure FPGA excels at hardware parallelism and deterministic latency; MPSoC integrates CPU, real-time cores and programmable logic into a single chip, balancing software flexibility and hardware acceleration. The two are not simple substitutes — they correspond to fundamentally different task-load characteristics. As a technical team deeply engaged in the FPGA field, Duyuan Electronics, based on the engineering practice of the ZU19EG and VU13P product lines, sorts out the technical logic of this selection problem from the nature of drone task loads, and provides reference solutions covering different scenarios.

2026-09-16·Read more →