SoC Development Boards

The DUUZ19EG development board is based on the Xilinx Zynq UltraScale+ MPSoC XCZU19EG-2FFVC1760I industrial-grade chip, integrating a quad-core ARM Cortex-A53 application processor + dual-core Cortex-R5F real-time processor + Mali-400MP2 GPU. The PL side features 1,143K logic cells, 1,968 DSP slices, and 34.6 Mb Block RAM. Onboard are 32 pairs of GTH (16.3 Gbps) + 16 pairs of GTY (32.75 Gbps) high-speed transceivers, 8GB PS-side DDR4 (with ECC) + 8GB PL-side DDR4, and 32GB eMMC mass storage. The carrier board exposes 4× QSFP28 optical ports (100G), 2× FMC expansion ports (HPC + LPC), PCIe Gen3 x8 edge connector, 4× SATA, 4× USB 3.0, Gigabit Ethernet, Mini DP output, and dual MIPI CSI camera interfaces. PYNQ support enables rapid development. It is an ideal platform for high-end communications, radar, and data acceleration applications. Typical applications: 5G/6G communications prototyping and testing, phased array radar signal processing, software defined radio (SDR), data center accelerator prototyping, high-end machine vision and video processing, and defense/aerospace high-reliability computing.
Interface, cooling, structure and batch supply can be customized per project · we respond within 1 business day after submission.
The DUUZ19EG development board is based on the Xilinx Zynq UltraScale+ MPSoC XCZU19EG-2FFVC1760I industrial-grade chip, integrating a quad-core ARM Cortex-A53 application processor + dual-core Cortex-R5F real-time processor + Mali-400MP2 GPU. The PL side features 1,143K logic cells, 1,968 DSP slices, and 34.6 Mb Block RAM. Onboard are 32 pairs of GTH (16.3 Gbps) + 16 pairs of GTY (32.75 Gbps) high-speed transceivers, 8GB PS-side DDR4 (with ECC) + 8GB PL-side DDR4, and 32GB eMMC mass storage.
The carrier board exposes 4× QSFP28 optical ports (100G), 2× FMC expansion ports (HPC + LPC), PCIe Gen3 x8 edge connector, 4× SATA, 4× USB 3.0, Gigabit Ethernet, Mini DP output, and dual MIPI CSI camera interfaces. PYNQ support enables rapid development. It is an ideal platform for high-end communications, radar, and data acceleration applications.
Typical applications: 5G/6G communications prototyping and testing, phased array radar signal processing, software defined radio (SDR), data center accelerator prototyping, high-end machine vision and video processing, and defense/aerospace high-reliability computing.
| Parameter | Specification |
|---|---|
| Product Model | DUUZ19EG V1.0 |
| MPSoC Chip | Xilinx XCZU19EG-2FFVC1760I (Industrial) |
| PS Processor | Quad ARM Cortex-A53 @ 1.333GHz + Dual Cortex-R5F @ 533MHz |
| GPU | Mali-400MP2 @ 667MHz |
| PL Logic Cells | 1,143,000 Logic Cells |
| PL LUTs | 523,000 LUTs |
| PL DSP Slices | 1,968 |
| PL Block RAM | 34.6 Mb |
| GTH Transceivers | 32 pairs TX/RX · up to 16.3 Gbps |
| GTY Transceivers | 16 pairs TX/RX · up to 32.75 Gbps |
| DDR4 Memory | PS 8GB (with ECC) + PL 8GB |
| eMMC Storage | 32GB |
| QSPI Flash | 512Mb + 512Mb dual-boot |
| Boot Modes | JTAG · QSPI · SD · eMMC |
| PCI Express | Gen3 x8 edge connector |
| Optical Interfaces | 4 × QSFP28 (100G) |
| FMC Expansion | 1 × FMC HPC (8 GTH, 164 I/O) + 1 × FMC LPC (1 GTH, 72 I/O) |
| Ethernet | PS 1× GigE + PL 1× GigE |
| Video | 1 × Mini DP + 1 × HDMI 2.0 output |
| USB | 4 × USB 3.0 host |
| Storage Expansion | 4 × SATA · 1 × SD card · 1 × M.2 SSD |
| MIPI | 2× MIPI CSI-2 camera input |
| Others | UART · RS485 · CAN · 4× user LED · 4× push buttons · RTC · EEPROM · 40P expansion |
| SoM Size | 90 × 75 mm (240P board-to-board ×4) |
| Carrier Size | 240 × 140 mm · ENIG |
| Power Supply | +12V / 5A DC input |
AI model deployment demands a balanced combination of compute power, bandwidth and power efficiency. With hardware parallelism, reconfigurable datapaths and rich high-speed interfaces, FPGA and MPSoC deliver low-latency, energy-efficient heterogeneous compute for CNN/YOLO inference, Vitis-AI acceleration and edge intelligence terminals, enabling rapid algorithm porting and product deployment.
5G/6G base stations and high-speed network equipment impose strict requirements on protocol processing, data forwarding and deterministic latency. With high-speed transceivers, reconfigurable protocol stacks and parallel pipelines, FPGA powers 100G optical communication, protocol processing and network security acceleration, providing a high-throughput, low-latency hardware platform from R&D to mass production.
4K/8K video, machine vision and industrial cameras impose strict requirements on end-to-end latency and interface coverage. With hardware-direct video paths and parallel pipelines, FPGA delivers microsecond-level deterministic processing in video encoding/decoding, image pre-processing, multi-protocol interfaces and low-latency transport, supporting deep customization of video services and vision algorithms.
Phased-array and imaging radar impose strict requirements on signal processing platforms: multi-channel parallel acquisition, high-throughput dataflow and deterministic low latency. With its reconfigurable parallel architecture, FPGA serves as the core carrier of radar signal processing, delivering multi-channel parallel, high-throughput, deterministic low-latency compute in beamforming, pulse compression and target detection, while supporting algorithm reconfiguration and platform evolution.
We respond within 1 business day after submission, supporting selection consulting, parameter customization and batch supply.
Contact · +86 18621324348